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Engineering the CMOS library : enhancing digital design kits for competitive silicon / David Doman.

By: Contributor(s): Material type: TextTextPublisher number: EB00063227 | Recorded BooksPublication details: Hoboken, N.J. : John Wiley & Sons, ©2012.Description: 1 online resource (iv, 327 pages) : illustrationsContent type:
  • text
Media type:
  • computer
Carrier type:
  • online resource
ISBN:
  • 9781118273142
  • 1118273141
  • 9781118273111
  • 1118273117
  • 9781118273135
  • 1118273133
Subject(s): Genre/Form: Additional physical formats: Print version:: Engineering the CMOS library.DDC classification:
  • 621.3815 23
LOC classification:
  • TK7874.65 .D66 2012eb
Online resources:
Contents:
Frontmatter -- Introduction -- Stdcell Libraries -- IO Libraries -- Memory Compilers -- Other Functions -- Physical Views -- Spice -- Timing Views -- Power Views -- Noise Views -- Logical Views -- Test Views -- Consistency -- Design for Manufacturability -- Validation -- Playing with the Physical Design Kit: Usually ₃At Your Own Risk₄ -- Tagging and Revisioning -- Releasing and Supporting -- Other Topics -- Communications -- Appendix I: Minimum Library Synthesis Versus Full-Library Synthesis of A Four-Bit Flash Adder -- Appendix II: Pertinent CMOS Bsim Spice Parameters with Units and Default Levels -- Appendix III: Definition of Terms -- Appendix IV: One Possible Means of Formalized Monthly Reporting -- Index.
Summary: "This book is about gaining a competitive edge in the Integrated Circuit IC marketplace. It suggests that there is an unrecognized value hidden in the safety margins of descriptive views in any piece of intellectual property (IP). This hidden value is normally left on the table. However, it can be used by the aggressive design engineer (or manager) to surpass the competition in the marketplace. This text reveals how the typical design house can enhance performance, reduce power, and improve the density of standard-cell logic. It will show how to add value to the generic, foundry-provided standard-cell library that most companies use without modification. Lastly, it identifies the low-risk opportunities aggressive designers and managers can employ to improve margin from overdesigned standard cells."-- Provided by publisher.Summary: "This book is about gaining a competitive edge in the Integrated Circuit IC marketplace"-- Provided by publisher.
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"This book is about gaining a competitive edge in the Integrated Circuit IC marketplace. It suggests that there is an unrecognized value hidden in the safety margins of descriptive views in any piece of intellectual property (IP). This hidden value is normally left on the table. However, it can be used by the aggressive design engineer (or manager) to surpass the competition in the marketplace. This text reveals how the typical design house can enhance performance, reduce power, and improve the density of standard-cell logic. It will show how to add value to the generic, foundry-provided standard-cell library that most companies use without modification. Lastly, it identifies the low-risk opportunities aggressive designers and managers can employ to improve margin from overdesigned standard cells."-- Provided by publisher.

"This book is about gaining a competitive edge in the Integrated Circuit IC marketplace"-- Provided by publisher.

Frontmatter -- Introduction -- Stdcell Libraries -- IO Libraries -- Memory Compilers -- Other Functions -- Physical Views -- Spice -- Timing Views -- Power Views -- Noise Views -- Logical Views -- Test Views -- Consistency -- Design for Manufacturability -- Validation -- Playing with the Physical Design Kit: Usually ₃At Your Own Risk₄ -- Tagging and Revisioning -- Releasing and Supporting -- Other Topics -- Communications -- Appendix I: Minimum Library Synthesis Versus Full-Library Synthesis of A Four-Bit Flash Adder -- Appendix II: Pertinent CMOS Bsim Spice Parameters with Units and Default Levels -- Appendix III: Definition of Terms -- Appendix IV: One Possible Means of Formalized Monthly Reporting -- Index.

Print version record.

Electrical & Electronic Engineering