TY - BOOK AU - Doman,David ED - Wiley InterScience (Online service) TI - Engineering the CMOS library: enhancing digital design kits for competitive silicon SN - 9781118273142 AV - TK7874.65 .D66 2012eb U1 - 621.3815 23 PY - 2012/// CY - Hoboken, N.J. PB - John Wiley & Sons KW - Digital integrated circuits KW - Design and construction KW - Metal oxide semiconductors, Complementary KW - Industrial efficiency KW - TECHNOLOGY & ENGINEERING KW - Electronics KW - Circuits KW - VLSI & ULSI KW - bisacsh KW - General KW - Integrated KW - fast KW - Digital integrated circuits / Design and construction KW - local KW - Electronic books N1 - Frontmatter -- Introduction -- Stdcell Libraries -- IO Libraries -- Memory Compilers -- Other Functions -- Physical Views -- Spice -- Timing Views -- Power Views -- Noise Views -- Logical Views -- Test Views -- Consistency -- Design for Manufacturability -- Validation -- Playing with the Physical Design Kit: Usually ₃At Your Own Risk₄ -- Tagging and Revisioning -- Releasing and Supporting -- Other Topics -- Communications -- Appendix I: Minimum Library Synthesis Versus Full-Library Synthesis of A Four-Bit Flash Adder -- Appendix II: Pertinent CMOS Bsim Spice Parameters with Units and Default Levels -- Appendix III: Definition of Terms -- Appendix IV: One Possible Means of Formalized Monthly Reporting -- Index; eee N2 - "This book is about gaining a competitive edge in the Integrated Circuit IC marketplace. It suggests that there is an unrecognized value hidden in the safety margins of descriptive views in any piece of intellectual property (IP). This hidden value is normally left on the table. However, it can be used by the aggressive design engineer (or manager) to surpass the competition in the marketplace. This text reveals how the typical design house can enhance performance, reduce power, and improve the density of standard-cell logic. It will show how to add value to the generic, foundry-provided standard-cell library that most companies use without modification. Lastly, it identifies the low-risk opportunities aggressive designers and managers can employ to improve margin from overdesigned standard cells."--; "This book is about gaining a competitive edge in the Integrated Circuit IC marketplace"-- UR - http://dx.doi.org/10.1002/9781118273142 ER -