Embedded SOPC design with NIOS II processor and VHDL examples
Chu, Pong P.
1959-
creator
Wiley InterScience (Online service)
text
bibliography
Electronic books.
nju
Hoboken, N.J
Wiley
©2011
2011
monographic
eng
1 online resource (xxxi, 703 pages) : illustrations
"The book is divided into four major parts. Part I covers HDL constructs and synthesis of basic digital circuits. Part II provides an overview of embedded software development with the emphasis on low-level I/O access and drivers. Part III demonstrates the design and development of hardware and software for several complex I/O peripherals, including PS2 keyboard and mouse, a graphic video controller, an audio codec, and an SD (secure digital) card. Part IV provides three case studies of the integration of hardware accelerators, including a custom GCD (greatest common divisor) circuit, a Mandelbrot set fractal circuit, and an audio synthesizer based on DDFS (direct digital frequency synthesis) methodology.The book utilizes FPGA devices, Nios II soft-core processor, and development platform from Altera Co., which is one of the two main FPGA manufactures. Altera has a generous university program that provides free software and discounted prototyping boards for educational institutions (details at http://www.altera.com/university). The two main educational prototyping boards are known as DE1 ($99) and DE2 ($269). All experiments can be implemented and tested with these boards. A board combined with this book becomes a "turn-key" solution for the SoPC design experiments and projects. Most HDL and C codes in the book are device independent and can be adapted by other prototyping boards as long as a board has similar I/O configuration"--
Front Matter -- Overview of Embedded System -- Basic Digital Circuits Development. Gate-Level Combinational Circuit -- Overview of FPGA and EDA Software -- RT-Level Combinational Circuit -- Regular Sequential Circuit -- FSM -- FSMD -- Basic Nios II Software Development. Nios II Processor Overview -- Nios II System Derivation and Low-Level Access -- Predesigned Nios II I/O Peripherals -- Predesigned Nios II I/O Drivers and HAL API -- Interrupt and ISR -- Custom I/O Peripheral Development. Custom I/O Peripheral with PIO Cores -- Avalon Interconnect and SOPC Component -- SRAM and SDRAM Controllers -- PS2 Keyboard and Mouse -- VGA Controller -- Audio Codec Controller -- SD Card Controller -- Hardware Accelerator Case Studies. GCD Accelerator -- Mandelbrot Set Fractal Accelerator -- Direct Digital Frequency Synthesis -- References -- Index.
Pong P. Chu.
Includes bibliographical references and index.
ds
Systems on a chip
Field programmable gate arrays
Computer input-output equipment
Design and construction
VHDL (Computer hardware description language)
TECHNOLOGY & ENGINEERING
Electronics
Circuits
General
COMPUTERS
Computer Engineering
COMPUTERS
Hardware
General
COMPUTERS
Machine Theory
Computer input-output equipment
Design and construction
Field programmable gate arrays
Systems on a chip
VHDL (Computer hardware description language)
TK7895.E42 C48 2011eb
621.39/2
TEC008010
Embedded SOPC design with NIOS II processor and VHDL examples
Chu, Pong P., 1959-
Hoboken, N.J. : Wiley, ©2011
(DLC) 2011022710
(OCoLC)682892489
9781118146507
1118146506
9781118146538
1118146530
1283282887
9781283282888
2011022710
http://dx.doi.org/10.1002/9781118146538
http://dx.doi.org/10.1002/9781118146538
DG1
111018
20230823095539.0
ocn757486963
eng