| 000 | 00735nam a2200241 a 4500 | ||
|---|---|---|---|
| 001 | 00010778 | ||
| 008 | 110328s2004 si a g 000 0 eng d | ||
| 020 |
_a9812531319 : _cTK412.00 |
||
| 040 |
_aBD-Dh-IUB _cBD-Dh-IUB |
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| 082 | 0 | 4 |
_a621.392 _219 |
| 100 | 1 | _aPadmanabhan, T. R | |
| 245 | 0 | 0 |
_aDesign Through Verilog HDL / _cT. R Padmanabhan, B. Bala Tripura Sundari |
| 250 | _a1st ed. | ||
| 260 |
_aSingapore : _bJohn Wiley and Sons, Inc, _c2004. |
||
| 300 |
_axii, 455p. : _billus ; _c23cm |
||
| 520 | 0 | _aComputer Science | |
| 556 | _a2005\07\25 | ||
| 650 | 1 | 7 |
_aComputer Hardware _2Spines |
| 650 | 1 | 7 |
_aComputer Language _2Spines |
| 700 | 1 | _aSundari, B. Bala Tripura | |
| 999 |
_c3891 _d3891 |
||
| 526 | _bcse | ||